PCI-X IP
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18
IP
from 7 vendors
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10)
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SMIC 0.18um PCI-X IO
- SMIC 0.18um process
- Non-inverter bi-direction pad
- Compatible to PCI-X Addendum Revision 1.0 Released at SEP 22,1999
- Level shift are built in
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64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
- Fully PCI-X 2.0 Mode1 compliant core, 64-bit, 133/66MHz interface with 3.3 V operation
- Customizable, programmable, single-chip solution
- Predefined implementation for predictable timing
- Incorporates Xilinx Smart-IP™ Technology
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64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
- Fully PCI-X 2.0 Mode1 compliant core, 64-bit, 133/66MHz interface with 3.3 V operation
- Customizable, programmable, single-chip solution
- Predefined implementation for predictable timing
- Incorporates Xilinx Smart-IP™ Technology
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64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
- Fully PCI-X 2.0 Mode1 compliant core, 64-bit, 133/66MHz interface with 3.3 V operation
- Customizable, programmable, single-chip solution
- Predefined implementation for predictable timing
- Incorporates Xilinx Smart-IP™ Technology
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64-bit PCI-X Master/Target
- Fully supports PCI and PCI-X protocol.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Efficient user interface for different types of user devices.
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64-bit PCI-X Host Bridge
- Fully supports PCI 2.3 and PCI-X protocol 1.0b.
- Designed for ASIC and PLD implementations.
- Fully static design with edge triggered flip-flops.
- Efficient user interface for different types of user devices.
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PCI-X Arbiter Supporting 66 / 100 / 133MHz
- PCI-X rev 1.0a compliant
- Supports 66/100/133MHz
- Fair arbitration using round robin
- Supports up to 5 masters