NOR flash IP

• Supports 100% of Serial NOR Flash protocol standard
• Supports all the Serial NOR Flash commands as per the specs
• Supports single and double transfer rate (STR/DTR)
• Supports following protocols in both STR and DTR:

• Supports 100% of Parallel NOR Flash protocol standard
• Supports all the Parallel NOR Flash commands as per the specs
• supports asynchronous random/page read:
• Page size : 16 words or 32 bytes

• Supports Twin Quad NOR Flash memory devices like MT25T_QLKT_L_01G_xBB from all leading vendors
• Supports 100% of Twin Quad NOR Flash protocol standards.
• Supports all the Twin Quad NOR Flash commands as per the specs.
• Supports Stacked device (two 512Mb die)

• Supports Serial NOR Flash memory devices like MT25QL128ABA, MT25QL512ABA, MX25L12835F, MX25L25635F, N25Q032A from all leading vendors like Macronix, Micron, Winbond and many more.
• Supports 100% of Serial NOR Flash protocol.
• Supports all the Serial NOR Flash commands as per the specs.
• Supports Single and Double Transfer Rate (STR/DTR).

• Supports Parallel NOR Flash memory devices from all leading vendors.
• Supports 100% of Parallel NOR Flash protocol standard.
• Supports all the Parallel NOR Flash commands as per the specs.
• Supports Asynchronous random/page read

• Designed to provide the execution-in-place (XiP) capability of encrypted instructions in flash memory.

This Universal NOR Flash IP supports a variety of NOR Devices and multiple Protocols, combines ease of use with high reliability, low power and speed under all conditions, including automotive applications.

The xSPI master IP supports the xSPI JESD251 standard from a standard AXI4 slave interface, and also features backwards compatibility support for Octal SPI, QSPI, DSPI, and SPI interfaces. Also supports JEDEC SFDP Standard.

• Device Density
• From 256Mb to 2Gb, with frequency up to 133MHz in SPI and 200MHz in OSPI mode
• Operation Mode
• Extended SPI mode, Octal SDR and DDR mode (Single I/O and Octal I/O)

• Memory mapped access to the connected flash devices
• Continuous Burst transfer support
• Auto boot support

• AXI4-Lite standard user interface. Connects as a 32-bit slave on AXI interface
• Page-wise programming according to the flash memory requirements handled by the IP
• Memory single bit error detection and correction implemented in the IP-core.
• User configurable, industry standard NOR flash memories can be interfaced with the IP on SPI and Quad-SPI interfaces.