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MIPI M-PHY IP

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Compare 67 IP from 13 vendors (1 - 10)
  • MIPI M-PHY G4 Designed For TSMC 28nm HPC+
    • Compliant to MIPI Alliance Standard for M-PHY specification Version 4.1
    • Supports M-PHY Type-I system
    • Support for Clock and Data Recovery Options
    Block Diagram -- MIPI M-PHY G4 Designed For TSMC 28nm HPC+
  • MIPI M-PHY - TSMC 40nm
    • Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY - TSMC 40nm
  • MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
    • Supports MIPI® Alliance Specification for M- PHY® Version 4.1.
    • Dual-simplex point-to-point interface with ultra-low voltage differential signaling.
    • Slew-rate control for EMI reduction.
    Block Diagram -- MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
  • MIPI M-PHY Designed For GF 28nm
    • •Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
    • •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
    • •Supports M-PHY Type-I system
    • •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
    Block Diagram -- MIPI M-PHY Designed For GF 28nm
  • UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
    • Compliant with JESD220B UFS 2.0
    • MIPI UniPro version 1.6
    • High-performance M-PHY v3.0 type 1
    Block Diagram -- UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6
  • MIPI MPHY v3.1, 1Tx-1Rx Type-1, SMIC 40LL, N/S orientation
    • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
    • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
    • Burst mode CDR with short sync length (< 16SI)
    • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
    Block Diagram -- MIPI MPHY v3.1, 1Tx-1Rx Type-1, SMIC 40LL, N/S orientation
  • MIPI MPHY v3.1, 2Tx-2Rx Type-1, UMC 22ULL 1.8V, N/S orientation
    • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
    • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
    • Burst mode CDR with short sync length (< 16SI)
    • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
    Block Diagram -- MIPI MPHY v3.1, 2Tx-2Rx Type-1, UMC 22ULL 1.8V, N/S orientation
  • MIPI MPHY v3.1, 1Tx-1Rx Type-1, TSMC 55LP,
    • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
    • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
    • Burst mode CDR with short sync length (< 16SI)
    • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
    Block Diagram -- MIPI MPHY v3.1, 1Tx-1Rx Type-1, TSMC 55LP,
  • MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 28HPC+, N/S orientation
    • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
    • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
    • Burst mode CDR with short sync length (< 16SI)
    • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
    Block Diagram -- MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 28HPC+, N/S orientation
  • MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 16FFC, N/S orientation(ASIL-B)
    • Supports RMMI interface for applications such as UNIPRO protocol (UFS, CSI-3, DSI-2) and DigRF
    • High speed gears, HS-G1A/B, HS-G2A/B and HS-G3A/B with scalable power consumptions
    • Burst mode CDR with short sync length (< 16SI)
    • Low speed PWM Gears from G1 to G4 with ultra-low power consumptions
    Block Diagram -- MIPI MPHY v3.1, 2Tx-2Rx Type-1, TSMC 16FFC, N/S orientation(ASIL-B)
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