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Compare 6,972 IP from 343 vendors (1 - 10)
  • Expanded Serial Peripheral Interface (xSPI) Slave Controller
    • The JESD251 Expanded Serial Peripheral Interface Slave controller is provides high data throughput, low signal count, and limited backward compatibility with legacy Serial Peripheral Interface(SPI) devices
    • It is used to connect xSPI Master devices in computing, automotive, Internet of Things, Embedded system and mobile system processor to non-volatile memories, graphics peripherals, networking peripherals,FPGAs, sensors devices
    Block Diagram -- Expanded Serial Peripheral Interface (xSPI) Slave Controller
  • Expanded Serial Peripheral Interface (xSPI)Master Controller
    • The Expanded Serial Peripheral Interface (JESD251) Master controller is low signal count, high data bandwidth, primarily for use in computing, automotive, Internet of Things, Embedded system and mobile system processor to connect multiple source of Serial Peripheral Interface (xSPI) slave devices like non-volatile memories, graphics peripherals, networking peripherals,FPGAs, sensors devices
    Block Diagram -- Expanded Serial Peripheral Interface (xSPI)Master Controller
  • DDR5 Serial Presence Detect (SPD) Hub Interface
    • The SPD5 Hub Function IP has been developed to interface I3C/I2C Host Bus and it allows an isolation of local devices like Temperature Sensor(TS), from master host bus
    • This SPD5 has Two wire serial interface like SCL, SDA
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    Block Diagram -- DDR5 Serial Presence Detect (SPD) Hub Interface
  • MIPI CSI -2 TRANSMITTER IP -V3
    • MIPI CSI-2 (Camera Serial Interface) Transmitter IP defines an interface between a peripheral device (camera) and host processor (application engine) for mobile applications
    • The MIPI CSI-2 Transmitter IP provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective interface that supports a wide range of imaging solutions for mobile devices
    Block Diagram -- MIPI CSI -2 TRANSMITTER IP -V3
  • MIPI CSI-2 V3 RECEIVER INTERFACE IP
    • The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile applications
    • The MIPI CSI-2 provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective interface that supports a wide range of imaging solutions for mobile devices
    Block Diagram -- MIPI CSI-2 V3 RECEIVER INTERFACE IP
  • ETSI SSP I3C Interface
    • The I3C interface for the communication of an Smart Secure Platform(SSP), as defined in ETSI using the Smart Secure Platform Common Layer (SCL) protocol
    • The use of the MIPI I3C Basic bus specification provides the ETSI SSP with a multitude of benefits, such as higher data rate, flexible and efficient information exchange, and strong integration of SSP in connected devices
    Block Diagram -- ETSI SSP I3C Interface
  • TSMC 5nm UCIe-A 32G LP Die to Die Interface
    • TSMC 5nm UCIe-A 32G LP Die to Die Interface
  • General-Purpose I/O Controller with APB Interface
    • User selectable number of GPIO signals from 1 to 32
    • All GPIO signals can be bi-directional (external bi-directional I/O cells are required in that case)
    • All GPIO signals can be tri-stated or open-drain enabled (external tri-state or open-drain I/O cells are required in that case)
    • GPIO signals programmed as inputs can cause an interrupt request to the CPU
    Block Diagram -- General-Purpose I/O Controller with APB Interface
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