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Search (718)
Compare 718 IP from 77 vendors (1 - 10)
  • Universal Chiplet Interconnect Express(UCIe) VIP
    • The UCIe VIP , a state-of-the-art solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of your UCIe designs
    • The UCIe VIP is fully compliant with UCIe Specification version 1.0 and supports all the layers of the UCIe stack, such as FDI, RDI, LogPHY, PCIe, and CXL protocols
    • The UCIe VIP is also very user-friendly and flexible, with simple APIs, easy integrations, and configurable parameters
    Block Diagram -- Universal Chiplet Interconnect Express(UCIe) VIP
  • AXI Interconnect
    • The AXI MATRIX-IP component is a multi-layer interconnect implementation of the AXI protocol, which is designed for high-performance, high-frequency system designs.
    • AXI MATRIX-IP is highly configurable with the capacity to handle up to 16 Masters and Slaves. IP can be configured to support AXI3, AXI4-Lite or AXI4
    Block Diagram -- AXI Interconnect
  • SPI Slave IP transfers to/from a AMBA APB, AXI, or AHB Interconnect
    • The DB-SPI-S-AMBA-BRIDGE is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting only Slave SPI Bus transfers (both Full Duplex and Half Duplex) to/from a AMBA APB, AXI, or AHB Interconnect.
    • The DB-SPI-S-AMBA-BRIDGE contains dual clock Transmit/Receive FIFOs and Finite State Machine control to process incoming SPI transmit/receive transactions, and a AMBA Master Interface (i.e. APB, AXI, AHB5) to read or write the SPI payload data with respect to the AMBA Interconnect. No processor is required for configuration or control; the DB-SPI-S-AMBA-BRIDGE operates autonomously from reset.
    Block Diagram -- SPI Slave IP transfers to/from a AMBA APB, AXI, or AHB Interconnect
  • AMBA AXI5-Lite Interconnect Verification IP
    • Compliant with the latest ARM AXI5-Lite Protocol Specification.
    • Supports AXI5-Lite Master, Slave, Interconnect, Monitor and Checker.
    • Supports all AXI5-Lite data and address widths.
    • Supports all protocol transfer types, burst types, burst lengths, burst sizes and response types.
    Block Diagram -- AMBA AXI5-Lite Interconnect Verification IP
  • AMBA AXI5 Interconnect Verification IP
    • Compliant with the latest ARM AMBA AXI5 Protocol Specification.
    • Supports AXI5 Master, Slave, Interconnect, Monitor and Checker.
    • Supports all ARM AMBA AXI5 data and address widths.
    • Supports all protocol transfer types, burst types, burst lengths, burst sizes and response types.
    Block Diagram -- AMBA AXI5 Interconnect Verification IP
  • AMBA AXI4-Stream Interconnect Verification IP
    • Compliant with the latest ARM AMBA AXI4-Stream Protocol Specification.
    • Supports AXI4-Stream Master, Slave, Interconnect, Monitor and Checker.
    • Supports all ARM AMBA AXI4-Stream data widths.
    • Support for all Data streams including Byte stream, Continuous aligned stream, Continuous unaligned stream and Sparse stream.
    Block Diagram -- AMBA AXI4-Stream Interconnect Verification IP
  • AMBA AXI4-Lite Interconnect Verification IP
    • Compliant with the latest ARM AMBA AXI4-Lite Protocol Specification.
    • Supports AXI4-Lite Master, Slave, Interconnect, Monitor and Checker.
    • Supports all ARM AMBA AXI4-Lite data and address widths.
    • Supports all protocol transfer types and response types.
    Block Diagram -- AMBA AXI4-Lite Interconnect Verification IP
  • AMBA AXI4 Interconnect Verification IP
    • Compliant with the latest ARM AMBA AXI4 Protocol Specification.
    • Supports AXI4 Master, Slave, Interconnect, Monitor and Checker.
    • Supports all ARM AMBA AXI4 data and address widths.
    • Supports all protocol transfer types, burst types, burst lengths, burst sizes and response types.
    Block Diagram -- AMBA AXI4 Interconnect Verification IP
  • AMBA AXI3 Interconnect Verification IP
    • Compliant with the latest ARM AMBA AXI3 Protocol Specification.
    • Supports AXI3 Master, Slave, Interconnect, Monitor and Checker.
    • Supports all AXI3 data and address widths.
    • Supports all protocol transfer types, burst types, burst lengths, burst sizes and response types.
    Block Diagram -- AMBA AXI3 Interconnect Verification IP
  • AHB Multilayer Interconnect IIP
    • Compliant with AMBA AHB specification
    • Supports configurable number of AHB Master
    • Supports configurable number of AHB Slave
    • Supports standardized user interface signals for easy integration with any IP
    Block Diagram -- AHB Multilayer Interconnect IIP
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