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I2C/SPI Controller IP

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Search (27)
Compare 27 IP from 9 vendors (1 - 10)
  • AXI Subsystem
    • Subsystem for microprocessors with 32-bit AMBA®AXI4 Interfaces, such as: BA2x, and Several RISC-V processors
    • Integrated Modules: AXI Multi-Layer Interconnect, Multichannel DMA, SRAM Controller, External parallel flash controller, and APB Subsystem (APB-SBS) (I2C, SPI, UART. GPIO, RTC. Timer, WDT, and PIC)
    • Highly configurable and customizable
    Block Diagram -- AXI Subsystem
  • Lattice Mico8 Open, Free Soft Microcontroller
    • Innovative Open IP Core License
    • Efficient Architecture and Broad Feature Set
    • Wishbone Peripheral Components:
    Block Diagram -- Lattice Mico8 Open, Free Soft Microcontroller
  • Block Diagram -- LatticeMico32 Open, Free 32-Bit Soft Processor
  • BA22 Cache-Enabled Embedded Processor
    • High Performance 32-bit CPU
    • 2.93 CoreMarks/MHZ
    • Single-cycle instruction execution on most instructions
    • Fast and precise internal interrupt response
    Block Diagram -- BA22 Cache-Enabled Embedded Processor
  • 32-bit Basic Application Processor
    • High Performance 32-bit CPU
    • 2.93 CoreMarks/MHz
    • Single-cycle instruction execution on most instructions
    • Fast and precise internal interrupt response
    Block Diagram -- 32-bit Basic Application Processor
  • MIPI SLIMbus Device Controller V2.0
    • Compliant with MIPI SLIMbus Specification version 1.01
    • Contains full-featured active interface device, with support for
    • Contains one generic device with up to 8 active port pairs; each port supports
    Block Diagram -- MIPI SLIMbus Device Controller V2.0
  • MIPI SLIMbus Host Controller v2.0
    • Compliant with MIPI SLIMbus Specification version 2.0
    • Contains full-featured active manager and interface devices
    Block Diagram -- MIPI SLIMbus Host Controller v2.0
  • Analog Data Acquisition Controller IP
    • AXI4-Lite standard user interface. Connects as a 32-bit slave on AXI interface
    • User configurable acquisition parameters: Sampling frequency, number of samples in bursts.
    • Programmable ADC interface to connect different types of ADCs in addition to analog multiplexers to connect multiple analog channels
    • Optimized power consumption
    Block Diagram -- Analog Data Acquisition Controller IP
  • 16Bit 91dB Audio CODEC with headphone drivers and PWM Controller, SMIC0.18um
    • DAC 91dB SNR, ADC 85dB SNR Audio Mono CODEC
    • PWM Controller for Class-D Amplifier Configuration
    • Capacitor-less dual channel headphone Output
    • 8KHz to 48KHz Sampling Frequency
  • 32-bit Deeply Embedded Processor
    • High Performance 32-bit CPU
    • 2.93 CoreMarks/MHz
    • Single-cycle execution on most instructions
    • Fast interrupt response
    Block Diagram -- 32-bit Deeply Embedded Processor
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