Display Processing IP
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99
IP
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10)
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Image Signal Processing for ADAS and Display Applications
- Multi-Camera Support
- Advanced Image Processing
- Every Pixel Reliable
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High-quality and powerful display processor
- Support 8K@60FPS or multiple 4K@120FPS
- All common HDR formats, including HDR10, HDR10+ and HLG
- Security Features for Content Protections
- Subjective and objective image quality
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2D GPU IP Core - Target Display Resolution: 8K
- Xwindow (EXA)
- Hardware Composer (HWC)
- DirectFB
- Pixel Rate (Pixels/Cycle): 4
- Target Display Resolution: 8K
- Direct 3D Tile Status and Buffer Option: yes
- Formats Support: RGB & YUV FP16/32
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2D GPU IP Core - Target Display Resolution: 4K
- Xwindow (EXA)
- Hardware Composer (HWC)
- DirectFB
- Pixel Rate (Pixels/Cycle): 2
- Target Display Resolution: 4K
- Direct 3D Tile Status and Buffer Option: yes
- Formats Support: RGB & YUV FP16/32
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2D GPU IP Core - Target Display Resolution: 2.5K~4K
- Xwindow (EXA)
- Hardware Composer (HWC)
- DirectFB
- Pixel Rate (Pixels/Cycle): 4
- Target Display Resolution: 2.5K~4K
- Direct 3D Tile Status and Buffer Option: yes
- Formats Support: RGB & YUV Limited
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High-resolution Image Processing IP
- 4K60p@400MHz (600MHz for display interface)
- Support various color format : YUV420, YUV422, YUV444, and RGB
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ACAP HDR Image Signal Processing Framework
- Complete HDR ISP video processing framework for multi-channel vision and AI systems
- Demonstrates logicBRICKS HDR ISP pipeline for parallel processing of three UHD automotive video cameras
- Fully compatible with Xylon logiIVID-ACAP-ISP HDR ISP Evaluation Kit for Versal ACAP based on AMD-Xilinx ACAP Versal VCK190 Evaluation Kit
- Runs on Linux OS, includes logicBRICKS software drivers and demo applications made with AMD-Xilinx Vitis™ Unified Software Platform 2021.2
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AXI Bus Display Controller
- Wide range of programmable Display Panel resolutions:
- Releases supporting baseline display requirements and releases with following
- optional display processing features:
- Color Palette RAM per layer or single Palette for integrated display image
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Image Signal Processing for Automotive and Industrial Applications
- Multi-Camera Support
- Advanced Noise Reduction
- Every Pixel Reliable
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Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
- DisplayPort version 1.4 compliant receiver
- PHY supports 1.62Gbps (RBR) to 5.4Gbps (HBR2) bit rate
- Integrated 100-ohm termination resistors with common-mode biasing
- Integrated equalizer with tunable strength
