Datapath IP

Compare 170 IP from 37 vendors (1 - 10)

SATA Bridge Platform (Optional: AES, Hardware Datapath)
- Fully compliant to SATA 1.5Gb/s, 3Gb/s, and 6Gb/s specifications (SATA 3.3).
- Independent host and device SATA speed negotiation.
- Software extensible bridging platformCommand set support for Windows, along with standard Linux discovery and communication.
- Boot Device Capable.
AES-GCM Authenticated Encrypt/Decrypt Core
- Encrypts and decrypts using the AES Rijndael Block Cipher Algorithm
- Implemented according to the National Institute of Standards and Technology (NIST) Special Publication 800-38D
- NIST Certified
- Processes 128-bit data in 32-bit blocks
Low-power, 16-bit RISC CPU with cache
- 16-bit RISC architecture
- 16 or 32 general purpose registers
- 92 basic instructions and 10 addressing modes
Low-cost & low-power 16-bit RISC CPU
- 16-bit RISC architecture
- 16 or 32 general purpose registers
- 92 basic instructions and 10 addressing modes
- Supports up to 74 user-defined instructions
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
- Package Flexibility
- Power Efficiency
- Low Latency
DDR5/4 PHY for Samsung
- Lowest latency for data-intensive applications
- Highest data rates with detailed system guidelines
GDDR6 PHY for Samsung
- Derived from Cadence’s silicon-proven DDR, LPDDR, and high-speed SerDes designs
- Highest data rates with detailed system guidelines
AES Encoder and Decoder
- Encrypts using the AES Rijndael Block Cipher Algorithm
- Employs key sizes of 128, 192, or 256 bits
- Key expansion function
USB3.2 Device Controller
- USB Device Controller with protocol-layer and link-layers implementation
- USB3 Gen2 x2 link with fallback to Gen2 x1, Gen1 x2, Gen1 x1, and backward compatibility for USB2 High/Full Speed modes
USB3.2 Retimer Controller
- Spec reference:
- Intel PIPE v4.3
- SuperSpeedPlus @10Gbps with fallback to SuperSpeed @5Gbps
- USB-Link parallel data-path 20bit for SS, and 32bit for SSP