IP Catalog > 4K/ 8K LCEVC Video Encoder

4K/ 8K LCEVC Video Encoder IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Search (82)
Compare 82 IP from 23 vendors (1 - 10)
  • H.265/HEVC 422 10bit Decoder for 4K
    • Video stream
    • - Compliant with ITU-T H.265, ISO/IEC 23008-2
    • - Main / Main 12 Profile Level 1 to 6.1
    • - Input format: Annex. B
  • H.265/HEVC 422 10bit Encoder for 4K
    • Compliant with ITU-T H.265, ISO/IEC 23008-2
    • Main / Main 12 Profile Level 1 to 6.1
    • Input format: Annex. B
  • H.265/HEVC H.264/AVC 422 12bit Multi-Codec for 8K
    • Image size: Up to 8K(8192×4320) 60fps
    • HEVC/AVC Multi-Codec
    • Memory bandwidth compression: Maximum 50% reduction is realized by TMC’s proprietary compression technology.
    • Best suited to low latency video transmission system.
  • H.264 Encoder High Profile (8K on Zynq/Arria)
    • Video compression standard ITU.T Rec. H.264 | ISO/IEC 14496-10 AVC.
    • EXTREME SPEED, providing a constant throughput of >5 pixels encoded per clock cycle.
    Block Diagram -- H.264 Encoder High Profile (8K on Zynq/Arria)
  • 4K JPEG 2000 Encoder/JPEG 2000 Decoder
    • Up to 4K 60images per second
    • Up to 1 or 2Gbps
    • Visually lossless compression
    • Fits in a Xilinx 7 Series (Kintex-7 and Virtex-7)
  • H.265 Decoder
    • The H.265 (HEVC – High Efficiency Video Coding) Decoder IP core delivers high-performance video decompression for next-generation visual applications, including broadcast, surveillance, automotive, and consumer electronics.
    • It supports real-time decoding of ultra-high-definition (UHD) video streams, up to 4K and 8K resolutions, while significantly reducing bandwidth and storage requirements without compromising video quality.
    Block Diagram -- H.265 Decoder
  • ISDB-T Modulator
    • The CMS0045 ISDB-T Modulator provides all the necessary processing steps to modulate one, two or three transport stream into a complex I/Q signal for input to a pair of DACs, or an interpolating DAC device such as the AD9857/9957 or AD9789. Optionally the output can be selected as an IF to supply a single DAC.
    • The design has been optimised to provide excellent performance in low cost FPGA devices such as the Cyclone range from Altera or the Spartan range from Xilinx
    Block Diagram -- ISDB-T Modulator
  • H.265 - Efficient video compression for high-quality, low-bandwidth streaming
    • H.265 (HEVC) is a video compression standard that offers up to 50% better compression efficiency than H.264, reducing bandwidth usage while maintaining high video quality. It supports high resolutions, scalable coding, and enhanced error resilience.
    • This versatile codec is used across various industries, including streaming services, video conferencing, IPTV, and medical imaging. Its applications ensure optimized video delivery with lower data usage and high-quality playback, even in limited network conditions.
    Block Diagram -- H.265 - Efficient video compression for high-quality, low-bandwidth streaming
  • H.265 Codec - Efficiently compresses high-quality video for streaming and storage
    • H.265 (HEVC) is a cutting-edge video compression standard that delivers superior video quality at lower bit rates compared to H.264. It efficiently compresses HD and UHD video, making it ideal for streaming, broadcasting, and video conferencing.
    • With support for higher resolutions like 4K and 8K, advanced encoding techniques, and flexible bit rate control, H.265 is used in a wide range of applications, enhancing the user experience for streaming services, broadcasting, and more.
    Block Diagram -- H.265 Codec - Efficiently compresses high-quality video for streaming and storage
×
Semiconductor IP