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32-bit Microcontroller IP

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Compare 46 IP from 22 vendors (1 - 10)
  • Small, Low Power, Energy Efficient 32-bit Microcontroller Processor
    • Exceptional code density - on average, the mix between 16-bit and 32-bit instructions yields a better code density when compared to 8-bit and 16-bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory.
    • Binary upward compatible with all other Cortex-M processors - the Cortex-M0 has mainly 16-bit Thumb-2 instructions and few 32-bit ones. These instructions are also present on all the other Cortex-M processors. Hence all code written for the Cortex-M0 will run as is on the other processors.
    • Built-in low-power features - sleep, deep sleep and state retention are three low power modes available to the user
    • Optional Debug Access Port and Serial Wire Debug - for devices where every pin counts the serial wire debug port uses only two pins
    Block Diagram -- Small, Low Power, Energy Efficient 32-bit Microcontroller Processor
  • 32-bit RISC-V microcontroller
    • Leading performance in class with optimized power consumption and area
    Block Diagram -- 32-bit RISC-V microcontroller
  • 32-bit RISC-V High Performance Microcontroller Class Processor
    • RISC-V (RV32IM) ISA
    • 3-stage in-order pipeline
    • Harvard architecture
    • High-performance multiply/divide unit
    Block Diagram -- 32-bit RISC-V High Performance Microcontroller Class Processor
  • 32-bit RISC Processor To Deliver High Performance In Low-Cost Microcontroller Applications
    • Powerful debug and non-intrusive real-time trace - Comprehensive debug and trace features dramatically improve developer productivity. It is extremely efficient to develop embedded software with proper debug.
    • Memory Protection Unit (MPU) - Software reliability improves when each module is allowed access only to specific areas of memory required for it to operate. This protection prevents unexpected access that may overwrite critical data.
    • Integrated nested vectored interrupt controller (NVIC) - There is no need for a standalone external interrupt controller. Interrupt handling is taken care of by the NVIC removing the complexity of managing interrupts manually via the processor.
    • Thumb-2 code density - On average, the mix between 16bit and 32bit instructions yields a better code density when compared to 8bit and 16bit architectures. This has significant advantages in terms of reduced memory requirements and maximizing the usage of precious on-chip Flash memory.
    Block Diagram -- 32-bit RISC Processor To Deliver High Performance In Low-Cost Microcontroller Applications
  • 2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
    • Programmable Shader engine with a VLIW instruction set
    • Command list based DMAs to minimize CPU overhead
    • Primitive Rasterizer
    Block Diagram -- 2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
  • 32-bit RISC-V processor specifically designed for the Automotive and Functional Safety markets
    • 32-bit RISC-V ISA
    • ASIL B and ASIL D area optimised product variants
    • Functional Safety Package and Independent Assessment
    Block Diagram -- 32-bit RISC-V processor specifically designed for the Automotive and Functional Safety markets
  • 32-bit Embedded RISC-V Functional Safety Processor
    • The EMSA5-FS is a processor core designed for functional safety.
    • The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing the RISC-V Instruction Set Architecture (ISA).
    Block Diagram -- 32-bit Embedded RISC-V Functional Safety Processor
  • 64-bit microcontroller highly-optimized for area, efficient performance, and simplified integration into 64-bit SoCs
    • 64-bit CPU
    • Greater than 32-bit physical address
    • Optional Tightly Integrated Memory (TIM)
    • Configurability
  • Compact 32-bit MCU core for deeply embedded applications and accelerator control
    • 32bit microcontroller core with RISC-V ISA
    • Harvard architecture, separate Instruction and Data memories
    • 32 or 16 32bit integer registers
    • RV32I or E basic instruction set, optional M and C extensions
    Block Diagram -- Compact 32-bit MCU core for deeply embedded applications and accelerator control
  • MicroBlaze Microcontroller Reference Design
    • Simple microcontroller implementation using MicroBlaze, UART, GPIO, and internal block RAM (BRAM) memory
    • Includes VHDL design files and project files for EDK/XPS
    • Includes "C" code for sample application
    • Requires the Xilinx Embedded Development Kit (DO-ML403-EDK-ISE-USB-UNI-G)
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