32-bit Ultra Low Power FFT IP

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Compare 16 IP from 8 vendors (1 - 10)
  • Ultra low power BLE 5.0 / ZigBee / Thread SoC - custom Modification, White Label chips
    • 32bit proprietary MCU: Better power performance then ARM M0 with max speed of 48Mhz
    • Memory: Program memory: 512kB Flash, 64kB on-chip SRAM with up to 32kB retention
    • RF transceiver: BLE 5.1 Compliant, 1Mbps, 2Mbps, Long Range 125kbps and 500kbps Or 2.4GHz proprietary 1Mbps/2Mbps/250kbps/500kbps mode with Adaptive
    • Frequency Hopping feature or 15.4 compliant, 250kbps
  • ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications
    • Dual 32x16 XMAC component supports up to two 32x16 MAC operations per instructions and supports all the 32x16 & dual 16x16 MAC instructions
    • Dual XMAC built in shifters and 80-bit accumulators allow pseudo floating-point operations to be performed which greatly expanded dynamic range
    • RAM configuration optimized for efficient area and power
    • Improved system efficiency with enhanced ARM® AMBA® AXI™/AHB™ bus bridges
    Block Diagram -- ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications
  • ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap
    • Dual 32x16 XMAC component supports up to two 32x16 MAC operations per instructions and supports all the 32x16 & dual 16x16 MAC instructions
    • Dual XMAC built in shifters and 80-bit accumulators allow pseudo floating-point operations to be performed which greatly expanded dynamic range
    • RAM configuration optimized for efficient area and power
    • Improved system efficiency with enhanced ARM® AMBA® AXI™/AHB™ bus bridges
    Block Diagram -- ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap
  • Ultra Compact 32-bit RISC-V CPU Core
    • AndeStar™ V5/V5e Instruction Set Architecture (ISA)
    • Compliant to RISC-V technology
    • Support RV32IMAC/EMAC
    Block Diagram -- Ultra Compact 32-bit RISC-V CPU Core
  • RTC Real time Clock With Oscillator Nano Power Series
    • RTC: The Real Time Clock (RTC) SGC22300 is uses the leading RTC oscillator solution SGC21510
    • This specially designed RTC core uses advanced analog design techniques to guarantee ultra low power consumption and ultra low leakage in any sub-micron technology
    • A broad range of options allow the customer to select the best solution for each system
    • A general-purpose register option enables the system architect to save the status bits in an ultra low leakage always on register
  • RTC Real time Clock With Oscillator Nano Power Series
    • RTC: The Real Time Clock (RTC) SGC22300 is uses the leading RTC oscillator solution SGC21510
    • This specially designed RTC core uses advanced analog design techniques to guarantee ultra low power consumption and ultra low leakage in any sub-micron technology
    • A broad range of options allow the customer to select the best solution for each system
    • A general-purpose register option enables the system architect to save the status bits in an ultra low leakage always on register
  • High-performance 32-bit RISC CPU
    • 32-bit RISC architecture
    • 16 or 32 general purpose registers
    • 104 basic instructions and 10 addressing modes
    Block Diagram -- High-performance 32-bit RISC CPU
  • Compact, low-power 32-bit RISC CPU
    • 32-bit RISC architecture
    • 16 or 32 general purpose registers
    • 104 basic instructions and 10 addressing modes
    • Optional IEEE 754 floating point unit (FPU)
    Block Diagram -- Compact, low-power 32-bit RISC CPU
  • RTC Real time Clock With Oscillator Nano Power Series
    • RTC: The Real Time Clock (RTC) SGC22300 is uses the leading RTC oscillator solution SGC21510
    • This specially designed RTC core uses advanced analog design techniques to guarantee ultra low power consumption and ultra low leakage in any sub-micron technology
    • A broad range of options allow the customer to select the best solution for each system
    • A general-purpose register option enables the system architect to save the status bits in an ultra low leakage always on register
  • Entry-level Low-Power 32-bit Processor
    • AndeStar V3m architecture
    • 2-stage pipeline
    • 16 32-bit general-purpose registers
    Block Diagram -- Entry-level Low-Power 32-bit Processor
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