32 bit RISC Microcontroller IP

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Compare 5 IP from 2 vendors (1 - 5)
  • x2 - 8-bit RISC Microcontroller
    • Software compatible with PIC16C6X industry standard
    • Harvard RISC architecture
    • 35 instructions
    • 14 bit wide instruction word
  • x4 - High Performance 8-bit RISC Microcontroller
    • Software compatible with PIC16C6X industry standard
    • Pipelined Harvard RISC architecture
    • 35 instructions
    • 14 bit wide instruction word
  • x4 - High Performance 8-bit RISC Microcontroller
    • Software compatible with PIC16C55X industry standard
    • Pipelined Harvard RISC architecture
    • 35 instructions
    • 14 bit wide instruction word
  • x2 - 8-bit RISC Microcontroller
    • Software compatible with PIC16C55X industry standard
    • Harvard RISC architecture
    • 35 instructions
    • 14 bit wide instruction word
  • ColdFire V2 Core with AMBA peripherals connected in a subsytem
    • Building upon the 68K foundation, ColdFire offers RISC performance with industry-leading code density and a rich set of connectivity peripherals.
    • By supporting variable-length instructions (16-, 32- or 48-bits long), the ColdFire Architecture enables higher code density than traditional 32- and 64-bit RISC machines.
    • More efficient use of on-chip memory reduces bus bandwidth and external memory requirements, resulting in lower system cost.
    Block Diagram -- ColdFire V2 Core with AMBA peripherals connected in a subsytem
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Semiconductor IP