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2D/2.5D Graphics Engine IP

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Compare 63 IP from 21 vendors (1 - 10)
  • Graphics Processor Overlay IP Core
    • Technology independent soft IP Core for FPGA, ASIC and SoC devices
    • Supplied as human-readable VHDL (or Verilog) source code
    Block Diagram -- Graphics Processor Overlay IP Core
  • 2D Graphics Hardware Accelerator (AHB Bus)
    • Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
    • Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
    • Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
    • Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
    Block Diagram -- 2D Graphics Hardware Accelerator (AHB Bus)
  • 2D Graphics Hardware Accelerator (AXI Bus)
    • Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
    • Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
    • Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
    • Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
    Block Diagram -- 2D Graphics Hardware Accelerator (AXI Bus)
  • 3D OpenGL ES GPU (Graphics Processing Unit)

     

    • Scalability throughout the entire design
    • Unified Shader Architecture
    • Massively parallel execution with fine grained Multithreading
    • Bandwidth reduction by e.g. on the fly data compression/decompression
    Block Diagram -- 3D OpenGL ES GPU (Graphics Processing Unit)
  • 2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
    • Programmable Shader engine with a VLIW instruction set
    • Command list based DMAs to minimize CPU overhead
    • Primitive Rasterizer
    Block Diagram -- 2.5D Multi-Core Raster & Vector Graphics Processor for low-power SoCs with Microcontroller
  • Fourth-generation Valhall-based graphics processing unit (GPU) for premium mobile market
    • Variable Rate Shading for Performance and Energy Boost
    • Evolving Execution Engine for Greater Compute Power
    • Massive ML Uplift for Advanced Intelligence
    Block Diagram -- Fourth-generation Valhall-based graphics processing unit (GPU) for premium mobile market
  • Third-Generation Valhall-based Graphics Processing Unit (GPU) for the sub-premium market
    • Redesigned Execution Engine for Lower-Cost Gaming
    • Improved Quality for Smartphone Market Growth
    • Industry-Leading Battery Efficiency
  • Third-Generation Valhall-based Graphics Processing Unit (GPU) for Premium Market
    • Command Stream Frontend for Advanced Gaming
    • Large Cores Provide Highest-Ever Energy Efficiency
    • ML Uplift Brings More Advanced Experiences to Mobile
  • 2D Blit and Raster Graphics
    • All buffer formats 100% compatible
    • Flexible pixel formats (1/2/4/8/16/18/24/32 bpp; any bit width per channel)
    • YUV support (packed, planar, 4:4:4, 4:2:2, 4:2:0, progressive, interlaced)
    • Dynamic re-configuration of processing units
  • 2D/3D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
    • D/AVE HD is an evolution in the D/AVE family supporting high quality 2D rendering and basic 3D rendering for displays up to 4K x 4K. With its high customizability D/AVE HD targets modern graphics applications in the Industrial, Medical, Military, Avionics, Automotive and Consumer markets. D/AVE HD is designed to be fast with powerful functionality and at the same time optimized regarding size and footprint. Its footprint optimized variants are especially suitable for low-power wearable products.
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