22nm SerDes IP
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28
IP
from 5 vendors
(1
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10)
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PCIe 4/3/2 SerDes PHY - GLOBALFOUNDRIES 22nm
- Duplex lane configurations of x2, x4, and x35
- Transmit swing of at least 800mV differential peak-to-peak for MR & LR, 360mv for SR
- Support for AC-coupled interfaces
- Fine-grain power up/down capability for power optimization, and ability to turn off unused link(s)
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32G LR Multi-Protocol SerDes (MPS) PHY - GLOBALFOUNDRIES 22nm
- Supports data rates of 2.5 to 32 Gbps
- Optimized for low-power operation and north/south die-edge placement
- AC-coupled RX front end with on-chip capacitors
- Flexible ASIC interface for sharing impedance codes among multiple PMA hard macros and reducing the number of external reference resistors for impedance calibration
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SerDes PHY IP in TSMC (7nm, 12/16nm, 22nm, 28nm)
- Supports 1.25G to 10.3125Gbps data rates and compact die area
- Supports up to 25dB channel loss@ 5.15625GHz
- Supports RX loss-of-signal detection
- Supports X1, X2 and X4 lanes
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TSMC CLN22ULLLVT 22nm Clock Generator PLL - 175MHz-875MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN22ULLLVT 22nm Clock Generator PLL - 350MHz-1750MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN22ULLLVT 22nm Clock Generator PLL - 700MHz-3500MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN22ULL 22nm Clock Generator PLL - 125MHz-625MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN22ULL 22nm Clock Generator PLL - 250MHz-1250MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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TSMC CLN22ULL 22nm Clock Generator PLL - 500MHz-2500MHz
- Designed as a very flexible clock multiplier capable of multiplying an input clock from 1 to 4096 with very small period jitter while operating at the highest possible bandwidth.
- Delivers optimal jitter performance over all multiplication settings.
- Available with multi-phase outputs and, in some processes, with an I/O voltage regulator.
- Ideal for system clock generation, SerDes and video clock applications.
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IO 1.8V LVDS Automotive Grade 1 GF (22nm)
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)