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ONFI IP

Welcome to the ultimate ONFI IP hub! Explore our vast directory of ONFI IP cores

The ONFI IP cores are used to access the external NAND flash for high speed transactions of multiple pages of read or write data taking advantage of the pipeline performance of newer enterprise NAND flash devices.

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Search (68)
Compare 68 ONFI IP from 20 vendors (1 - 10)
  • ONFI 5.0 PHY
    • The PHY design supports the newly introduced NV-LPDDR4 mode along with SDR, NV_DDR, and NV_DDR2, NV_DDR3 mode.
    Block Diagram -- ONFI 5.0 PHY
  • ONFI 5.0 NAND FLASH Controller Compliant to JEDEC
    • ONFI v5.0 compliant + Up to 2.4GByte/s.
    • All I/O modes implemented + SDR + NV-DDR + NV-DDR2/3 + NV-LPDDR4
    • Wide hardware support + Four 8-bit data paths + 8 NAND targets each + Data bus inversion.
    • Full PLL support + PLL within PHY + 10MHz SDR + 1.2GHz NV-LPDDR4 + Everything in between
    Block Diagram -- ONFI 5.0 NAND FLASH Controller Compliant to JEDEC
  • ONFI Flash Controller
    • AXI System Interface
    • NAND Flash
    Block Diagram -- ONFI Flash Controller
  • ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
    • Page Size – 2KB, 4KB, 8KB, 16KB
    • Bank/chip select options
    • Programmable timing
    Block Diagram -- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
  • ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 28nm
    • Page Size – 2KB, 4KB, 8KB, 16KB
    • Bank/chip select options
    • Programmable timing
    Block Diagram -- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 28nm
  • ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 12nm
    • Page Size – 2KB, 4KB, 8KB, 16KB
    • Bank/chip select options
    Block Diagram -- ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 12nm
  • ONFI 4.0 NAND Flash Controller & PHY
    • • Support ONFI 4.0, EZ – NAND, Standard ClearNAND, Advanced ClearNAND
    • • Support standard asynchronous NAND flash
    • • High performance from 40MT/s to 800MT/s
    • • High density NAND flash up to 1024 Gb
    Block Diagram -- ONFI 4.0 NAND Flash Controller & PHY
  • Universal NandFlash Controller
    • The Universal NAND Flash Controller (IPM-UNFC) IP core is designed specifically to enable commodity Flash memory to be effectively used in enterprise storage applications requiring high reliability and large interconnect bandwidth.
    • Using the pre-validated IPM-UNFC IP allows greatly reduced time-to-market for storage OEMs desiring higher IOPS benefitting from lower cost SLC, MLC , TLC & QLC NandFlash memory.
    Block Diagram -- Universal NandFlash Controller
  • NAND Flash Memory Controller with DMA
    • ONFI 4.0 support
    • BCH EDAC with up to 60 bits correction capacity per 1024 bytes chunks of data
    • Randomization of memory data
    • Basic timeout based SEFI detection and reporting
    Block Diagram -- NAND Flash Memory Controller with DMA
  • ONFI 3.2 NAND Flash Controller
    • Compliant to ONFI revision 3.2 standard 
    • Supports NV-DDR2 mode of operation supporting up to 200MHz
    • Supports NV-DDR mode of operation supporting up to 100MHz 
    • Supports legacy Asynchronous devices operating from 10MHz to 50MHz 
    Block Diagram -- ONFI 3.2 NAND Flash Controller
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