Our 4800 ONFI PHY is a complete IP solution, including I/O, PMA, PCS and test engine with four-tap DFE. The IPT 4800 ONFI PHY facilitates high-speed data transfer between NAND flash memory and host controllers. This interface is crucial for enhancing the performance and reliability of storage solutions in various applications, from consumer electronics to industrial systems.
4800 ONFI NV-DDR3 and NV-LPDDR4 with 4-tap DFE
Overview
Key Features
- Supports Both NV-DDR3 and NV-LPDDR4 with 4-tap DFEs
- NV-DDR3 up to 3,600 MT/s
- NV-LPDDR4 up to 4,800MT/s
- Support Decision Feedback Equalization (DFE): For extra high loading, DFE can reduce errors and improve data integrity
- Compliant with JEDEC 6.0 (TBD) and JESD 230G specifications
- Supports real-time PVT data-eye monitoring
- Supports all required trainings and calibrations
- Supports Power-Down Modes
- Active
- Low-power Run
- Sleep
- Low Power Sleep
- Standby
- Hibernate
- Compliant with AMBA APB3.0 for register accessing
Block Diagram
Technical Specifications
Short description
4800 ONFI NV-DDR3 and NV-LPDDR4 with 4-tap DFE
Vendor
Vendor Name
Related IPs
- 3600 ONFI NV-DDR3 and NV-LPDDR4 with Optional DFE
- Synchronous FIFO with configurable flags and counts
- Asynchronous FIFO with configurable flags and counts
- Stallable pipeline stage with protocol for multiway pipeline fork and join capability
- Efficient microcontroller core with a 5-stage in-order pipeline, privilege modes, an MPU, L1 and L2 caches
- Efficient microcontroller core with a 5-stage in-order pipeline, privilege modes, an FPU, an MPU, L1 and L2 caches