USB 3.0 IP
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USB 3.0 IP
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107
USB 3.0 IP
from 22 vendors
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10)
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MIPI M-PHY - TSMC 40nm
- Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
- •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
- •Supports M-PHY Type-I system
- •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
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A 65nm Wirebond IO library with 1-3.3V GPIO, 3.3V pulse-width modulation cell, I2C & SVID open-drain, 3.3V & 5V analog and OTP program cell
- GPIO:
- I2C / SVID Open-Drain I/O:
- ANALOG
- OTP Programming Cell
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MIPI M-PHY Designed For GF 28nm
- •Compliant to MIPI Alliance Standard for M-PHY specification Version 3.0
- •Supports high speed data transfer G1A/B, G2A/B and G3A/B with data rates of up to 5830.4 Mbps
- •Supports M-PHY Type-I system
- •Support for reference clock frequencies of 19.2MHz/26MHz/38.4MHz/52MHz
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USB 3.0 SSIC PHY
- Compliant with SSIC specification 1.0
- Compliant with MIPI-MPHY (Type-1) specification Rev 3.0-r.03
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USB HSIC PHY - High Speed Inter-Chip IP Core
- High-Speed 480Mbps data rate only
- Source-synchronous seriel interface
- No power consumed unless a transfer is in progress.
- Maximum trace length of 10cm
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USB 3.0 Device Controller
- USB 3.0 Compliance
- 8/16/32 bit USB 3.0 PIPE interface
- 8/16 UTMI/ULPI interface
- Master DMA implementation for each endpoint with Scatter Gather support
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USB 3.0 PHY IP, Silicon Proven in TSMC 7FF
- Compliant with Universal Serial Bus 3.0 Specification
- Supports 2.5GT/s and 5.0GT/s serial data transmission rate
- Compliant with PIPE 3.0
- Compliant with Universal Serial Bus 2.0 Specification
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USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
- Standard PHY interface (PIPE) enables multiple IP sources for PCIe/USB3 MAC layer
- Supports 2.5GT/s and 5.0GT/s serial data transmission rate
- Supports 16-bit or 32-bit parallel interface
- Data and clock recovery from serial stream
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USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+
- Support PHY interface (PIPE4.3) enables multiple IP sources for USB3 MAC layer
- Supports 5.0Gbps and 10Gbps serial data transmission rate
- Supports 16-bit or 32-bit parallel interface
- Data and clock recovery from serial stream
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USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in UMC 28HPC
- Support PHY interface (PIPE4.3) enables multiple IP sources for USB3 MAC layer
- Supports 5.0Gbps and 10Gbps serial data transmission rate
- Supports 16-bit or 32-bit parallel interface
- Data and clock recovery from serial stream
