Memory Interfaces IP for TSMC
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Memory Interfaces IP
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PHY IO for PSRAM memory PHY, 1066Mbps on TSMC 22nm
- The PHYIOs is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the PSRAM device
- The TX is designed to send information from PHY to PSRAM and RX is designed to receive information which is from PSRAM
- there are bi-direction DQ IO, TX-only CK IO, filler cell with differrent size and VDDQ/VSS power clamp IO included in the PHYIOs.
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ONFI_4 IO Pad Set
- ONFI Single-Ended Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
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7 way DDR combo
- Full DDR4 capability
- Full DDR3 / DDR3L / DDR3U capability
- Full LPDDR4 capability
- Full LPDDR3 capability
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ONFI 4.1 I/O Pad Set
- ONFI Single-Ended Driver / Receiver Features:
- ? Driver – user-selectable on-die termination and programmable drive strength with ODT / ZO calibration and programmable “off” state control.
- o ODT Rtt = 30? / 50? / 75? / 100? / 150?
- o ZOUT = 18? / 25? / 35? / 50?
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7 way DDR combo
- Full DDR4 capability
- Full DDR3 / DDR3L / DDR3U capability
- Full LPDDR4 capability
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SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
- • Mode select – DDR2 or DDR3
- • Single-ended and differential signaling
- • DDR2 capability
- o Compliant with JEDEC specification JESD79-2E, DDR2-400
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LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
- Full DDR4 capability
- Data rates – 1600 MT/s, 1866 MT/s, 2133 MT/s, 2400 MT/s
- Full DDR3 / DDR3L / DDR3U capability
- Data rates – 800 MT/s, 1066 MT/s, 1333 MT/s, 1600 MT/s, 1866 MT/s, 2133 MT/s
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I2C IO Pad Set
- • Supported I2C operating modes:
- o Standard-mode (Sm) – 100 Kbps data rate
- o Fast mode (Fm) – 400 Kbps data rate
- o Fast mode (Fm+) – 1.0 Mbps data rate