General-Purpose I/O (GPIO) IP for TSMC
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General-Purpose I/O (GPIO) IP
for TSMC
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General-Purpose I/O (GPIO) IP
for TSMC
from 3 vendors
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- 3nm
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TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries, multiple metalstacks
- Supports 1.8V/2.5V/3.3V mixed-voltage-tolerant/failsafe output buffer
- Fully programmable output driver strengths, input Schmitt trigger, and output slew rate
- Supports circuit-under-pad (CUP), non-CUP-inline and staggered-bond pad placement
- Supports retention and bus-keeper feature
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TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries
- Supports 1.8V/2.5V/3.3V mixed-voltage-tolerant/failsafe output buffer
- Fully programmable output driver strengths, input Schmitt trigger, and output slew rate
- Supports circuit-under-pad (CUP), non-CUP-inline and staggered-bond pad placement
- Supports retention and bus-keeper feature
-
TSMC 3nm (N3E) 1.2V/1.8V GPIO Libraries
- Supports 1.8V/2.5V/3.3V mixed-voltage-tolerant/failsafe output buffer
- Fully programmable output driver strengths, input Schmitt trigger, and output slew rate
- Supports circuit-under-pad (CUP), non-CUP-inline and staggered-bond pad placement
- Supports retention and bus-keeper feature
-
High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option