Frac-N PLL IP for TSMC

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Compare 18 Frac-N PLL IP for TSMC from 6 vendors (1 - 10)
  • Low Power FracN/SSCG PLL on TSMC CLN6FF
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    • Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
    Block Diagram -- Low Power FracN/SSCG PLL on TSMC CLN6FF
  • FracN/SSCG PLL on TSMC CLN5
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    • Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
    Block Diagram -- FracN/SSCG PLL on TSMC CLN5
  • Core Powered FracN/SSCG PLL on TSMC CLN7FF
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    • Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
    Block Diagram -- Core Powered FracN/SSCG PLL on TSMC CLN7FF
  • Core Powered FracN/SSCG PLL on TSMC CLN5A
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Entirely core voltage powered, needs no analog supply voltage
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Core Powered FracN/SSCG PLL on TSMC CLN5A
  • Core Powered FracN/SSCG PLL on TSMC CLN5
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Entirely core voltage powered, needs no analog supply voltage
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Core Powered FracN/SSCG PLL on TSMC CLN5
  • Core Powered FracN/SSCG PLL on TSMC CLN4P
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Entirely core voltage powered, needs no analog supply voltage
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Core Powered FracN/SSCG PLL on TSMC CLN4P
  • Automotive Grade Frac-N on TSMC CLN22ULL
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Ability to generate precise system clocks synchronized to track remote sources
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Automotive Grade Frac-N on TSMC CLN22ULL
  • 100 to 1200MHz phase-locked loop
    • TSMC CMOS 55 nm
    • Output frequency range from 100 MHz to 1200 MHz
    • Fully integrated VCO
    Block Diagram -- 100 to 1200MHz phase-locked loop
  • 4.4 GHz To 7.75 GHz Low phase Noise Fractional-N Synthesizer
    • Low Phase Noise, Low pin count
    • Reference input: 81.25 MHz to 162.5 MHz
    • Flavor 1 Output frequency range: 4.4 GHz to 6.4 GHz (3 VCOs needed)
    • Flavor 2 Output frequency range: 6.87 GHz to 7.75 GHz (2 VCOs needed)
    Block Diagram -- 4.4 GHz To 7.75 GHz Low phase Noise Fractional-N Synthesizer
  • Low Power Frac-N on TSMC CLN28HPC+
    • Electrically Programmable PLL for multiple applications
    • Ability to generate precise system clocks synchronized to track remote sources
    • Very fine precision: near 1 part per billion resolution
    • Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
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