12-Bit ADC IP for SMIC

Compare 24 12-Bit ADC IP for SMIC from 5 vendors (1 - 10)

Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
- Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, Global Foundries and Samsung
- Resolution: 12-bit
- Data Rate: 1Msps/200Ksps
- DNL: ±1.5 LSB, INL: ±3 LSB
Video ADC - 12-bit Successive Approximation Register (SAR) ADC
- The analog-to-digital converter is a differential high speed low power IP which uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
- The ADC includes a core internal SAR ADC which consists of sample/hold circuits, a capacitive DAC, a comparator and logic control circuits.
- The ADC is designed with high dynamic performance for input signal frequencies up to Nyquist.
- It is perfectly suitable for broadband communication applications.
SAR ADC
12 Bit ADC - SMIC 110nm generic
- Supports 1Ksps~3Msps sampling rate; 16CH single-ended/8CH differetial; SNR:64dB @2Msps, THD:-72dB @2Msps;
- Power consumption: 0.7mA @2Msps;
12 Bit ADC - SMIC130nm Eflash
- Supports 1Ksps~3Msps sampling rate;
- High performance: ENOB=11.2bit @1Msps;
- Ultra-low power: <1uA @1Ksps; 10uA @32Ksps; <180uA @1Msps
12 Bit ADC - SMIC130nm Eflash
- Supports 500Ksps~20Msps sampling rate; self-calibration
- High performance: ENOB>10.8bit @10Msps, ENOB>10.5bit @20Msps; Low power: <5mA @20Msps
- IP area:0.12mm2
12 Bit ADC - SMIC 55nm Eflash
- Supports 2Msps~50Msps sampling rate;
- ENOB>8bit
- Low power: 2mW @50Msps; Size=0.03mm2
12 Bit ADC - SMIC 55nm Eflash
- Internal attenuator to support that the external analog signal range is out of ADC input range.
- Internal signal buffer
- Sampling rate range: 1Ksps~3Msps
- SNDR: >63dB@1Msps
12 Bit ADC - SMIC 55nm Eflash
- Supports 1Ksps~3Msps sampling rate; 4ch differential/ 8ch single-ended
- High performance: ENOB=11.2bit @1Msps;
- Ultra-low power: <1uA @1Ksps; 8uA @32Ksps; 200uA @1Msps;
- Ultra-low leakage; IP area: 0.083mm2
ADC 12-bit 80Mhz Dual channel - 3.3V
- • 12-Bits pipeline architecture
- • 40MS/s sampling rate
- • No missing code guaranteed
- • 2.0 Vp-p differential input