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Analog IP for GLOBALFOUNDRIES

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Compare 784 Analog IP for GLOBALFOUNDRIES from 30 vendors (1 - 10)
  • 11 Bit 100 kS/s Ultra-Low Power SAR ADC on GlobalFoundries 22FDSOI
    • The ADC IP is a general-purpose successive approximation converter for low-power medium resolution applications. Sample rate, resolution and power consumption are configurable.
    • It is built using typical differential capacitor-DAC architecture, clocked comparator and bootstrapped switches. No additional reference voltage is required, achieving lmost rail-to-rail input. The target applications are environmental and biomedical signal processing.
    Block Diagram -- 11 Bit 100 kS/s Ultra-Low Power SAR ADC on GlobalFoundries 22FDSOI
  • ULP Clock-Generator - GLOBALFOUNDRIES 22FDX
    • ABB-enabled, All-Digital PLL clock generator for ultra-low power clocking in highly energy efficient Systems on Chip
    • The Ultra-Low Voltage Clock Generator is targeted at Systems on Chip (SoCs) employing advanced power management techniques.
    • The robust, fully digital architecture allows operation in a wide voltage and frequency range. Unique fast lock and instant frequency change features maximize the energy efficiency of the targeted systems.
    Block Diagram -- ULP Clock-Generator - GLOBALFOUNDRIES 22FDX
  • Body bias voltage generator - GLOBALFOUNDRIES 22FDX
    • The ABX Generator IP is a body bias voltage generator for the ABX Platform for GLOBALFOUNDRIES 22FDX® technology.
    • It contains a closed loop body bias regulation loop to generate N-well and P-well bias voltages for adaptive compensation of process, voltage and temperature (PVT) variations during device operation.
    Block Diagram -- Body bias voltage generator - GLOBALFOUNDRIES 22FDX
  • Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
    • Tightly integrated power management platform with a soft-IP wrapper around Analog / Mixed-Signal hard macros which generate all supply voltages and clock signals needed to run highly efficient SoCs in GlobalFoundries® 22FDX®.
    • Running from only one supply voltage and reference clock, the IP generates its own internal supplies and references, and those needed to run the Racyics® ABX® Generator.
    Block Diagram -- Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
  • ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
    • The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
    • High energy efficiency: Only 5 μW are consumed during operation
    • A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
    Block Diagram -- ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
  • Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
    • RI_ABB_GF22FDX is a cutting-edge adaptive body bias (ABB) generator for GLOBALFOUNDRIES® 22FDX® technology.
    • Featuring patented closed control loops with independent N-well and P-well body bias voltage generation, this silicon-proven IP dynamically compensates for process, voltage, and temperature (PVT) variations during operation.
    Block Diagram -- Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
  • Automotive Grade 1 – PVT Sensor on GLOBALFOUNDRIES 22FDX-AG1
    • The PVT Sensor is a highly integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high precision even in untrimmed usage.
    • It consumes very little power even in operational mode, and leakage power only when temperature measurement is complete.
    • An additional voltage sample mode is included allowing for supply voltage monitoring, and process monitor mode to assess transistor performance.
    Block Diagram -- Automotive Grade 1 – PVT Sensor on GLOBALFOUNDRIES 22FDX-AG1
  • Special Purpose Low (Statistical) offset Operation Amplifier
    • The WEAOPSPLO18PI18RO12M22G is a special purpose low offset buffer for bias generator that provides a buffered ouput for the Temperature Sensor
    • The OpAmp deliberately exhibits systematic offsets to favor near zero Output Voltages
    • It is Ideal for Temperature sensors with Rail – To – Rail Output that can go down to zero values.
    Block Diagram -- Special Purpose Low (Statistical) offset Operation Amplifier
  • Rail to Rail Input and Output Operational Amplifier
    • The WEAOPSP18RI18RO1F22G is a rail to rail input and rail to rail output folded cascode with rail to rail output gm stage with input offset control capability
    • The opamp is ideal for ADC input buffers with offset control requirements for the ADC calibration.
    Block Diagram -- Rail to Rail Input and Output Operational Amplifier
  • Special Purpose Low offset Operational Amplifier
    • The WEAOPSLOSP18NI18RO12M22G is a special purpose low offset buffer for bias generator that provides a buffered output for the bandgap voltage.The OpAmp deliberately exhibits systematic offsets to favor near zero Output Voltages
    • It is Ideal for Power Detector and Temperature sensors with Rail – To – Rail Output that can go down to zero values.
    Block Diagram -- Special Purpose Low offset Operational Amplifier
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