Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper
Overview
The CORE Generator™ Virtex®--5 Embedded Tri-mode Ethernet Media Access Controller (MAC) Wrapper automates the generation of HDL wrapper files for the embedded Tri-mode Ethernet MAC in Virtex-5 devices. Preconfigured HDL wrappers as well as testbenches and implement and simulation scripts are generated automatically based on user defined options.
Key Features
- Provides user configurable Virtex-5 Tri-mode Ethernet MAC (TEMAC) physical interface
- Simplifies interconnection between the Ethernet MAC and the PHY
- Allows selection of one or both of the two Ethernet MACs (EMAC0 or EMAC1) from the Ethernet MAC primitive
- Individual DCR base address for EMAC0/EMAC1
- Sets EMAC0/EMAC1 attributes based on user options
- Supports MII, GMII, RGMII v1.3, RGMII v2.0, SGMII, and 1000BASE-X PCS/PMA interfaces
- Clock Enable inputs on the Transmit and Receive clients available when the Ethernet MAC is configured in GMII/MII or RGMII modes (halves the BUFG requirements)
- "Byte PHY" clocking scheme for Tri-Mode GMII/MII (halves the BUFG requirements)
- Instantiates BUFs, DCMs, GTPs, and logic required for MII, GMII, RGMII, SGMII, and 1000BASE-X PCS/PMA interfaces
- Includes testbench for wrappers using the EMAC and GTP Smartmodels
- Generates VHDL or Verilog® wrappers
- 16-bit client interface supports 2Gb/s data rates
- Implementation scripts and UCF file
- Simulation scripts for Mentor® Modelsim® and Cadence™ IUS (functional and timing simulation)