Ethernet PCS IP - Integrates MAC IP to a broad range of PHY and SerDes IP

Overview

The Ethernet PCS and connectivity IP provide you with a wide range of connectivity IP that can be used to interface Cadence and third-party MAC IP to standard interfaces. Our Ethernet PCS solutions ease integration of MAC IP with a broad range of PHY and SerDes IP. Our connectivity IP solutions include XGMII to GMII converters and Backplane Ethernet Auto-Negotiation (BEAN).

Key Features

  • USXGMII PCS 
    • Multi-speed with Clause 37-type auto-negotiation
    • Configurable as 5GBASE-R or 10GBASE-R compliant with IEEE 802.3 Clauses 49 and 129
  • XAUI PCS
    • Available in 10-bit and 20-bit datapath versions
    • Optional 1Gb/s mode with 4x GMII channels

Benefits

  • Mature: Silicon-proven design in volume production at multiple customers
  • Ease-of-use: Customizable with easy integration
  • Designed by an Industry Leader: Cadence is an active contributor to the IEEE 802.3 standards working groups

Block Diagram

Ethernet PCS IP - Integrates MAC IP to a broad range of PHY and SerDes IP Block Diagram

Deliverables

  • Documentation—Integration guide, user guide, quick start guide, and release notes
  • Functional Safety—safety manual including FMEDA report and description of automotive safety features
  • Synthesizable Verilog HDL
  • Synthesis scripts
  • Sample Verilog testbench with confidence tests

Technical Specifications

Maturity
Silicon Proven
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Semiconductor IP