USB 2.0 Device IP Core

Overview

A USB 2.0 Device IP Core that provides high performance small footprint solution for quick and easy implementation of a USB Device interface.
The USB 2.0 Device IP Core is ideal for applications
where the target device must act as a peripheral only. It provides portable devices with a cost-effective way of conducting point-to-point communications using the USB bus.

Key Features

  • "USB 2.0 HS-Device" Certified
  • USB 2.0 high performance operation
  • UTMI L2+ Interface, ULPI 1.1 wrapper and FS only transceiver interface available
  • Full USB peripheral support
  • High Speed and Full Speed mode support
  • Up to 16 endpoints
  • Bulk, interrupt and isochronous transfers
  • Slave and Master System Interface
  • No dedicated local memory required
  • Compact and cost-effective solution for SoC
  • Soc Interface: WISHBONE, AHB, OCP, OPB, PLB, AVALON

Benefits

  • Flexible
  • Compact
  • Cost-effective

Deliverables

  • Verilog Source Code
  • Test Bench
  • Sample Syntheis scripts
  • Dcumentation

Technical Specifications

Foundry, Node
Any
Maturity
production
Availability
now
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Semiconductor IP