SMIC 65nm LL 1.2v/2.5v APLL
Overview
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM [3:0] and DN [6:0] to different values according to different CLKIN, CLK will be locked at the multiples of input frequency.
Key Features
- Process: SMIC 65nm LL Logic 1P8M 1.2V/2.5v CMOS process
- Supports 4.00.00 or above metal stack
- Supports the following types of Mos device : nfet, pfet, dgnfet, dgpfet
- Supply voltage: 1.08v~1.2v~1.32v/2.25v~2.5v~2.75v
- Operating junction temperature: - 40°C ~ +25°C ~ +125°C
Technical Specifications
Foundry, Node
SMIC 65nm
SMIC
Pre-Silicon:
65nm
LL