SMIC 0.25um High Density Standard Cell Library
Key Features
- SMIC 0.25um Logic 1P5M Salicide 2.5V/3.3V Process.
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for High-Density, High-Speed, and Low-Power.
- Engineered for Synthesizability and Routability.
- Scan Flip-flops for Design for Testability Support.
Technical Specifications
Foundry, Node
SMIC 0.25um
Maturity
Silicon Proven
Availability
Now
SMIC
Pre-Silicon:
250nm
G
Related IPs
- 6 track High Density standard cell library at TSMC 180nm
- SMIC 0.13um Low Leakage high density RVT_x005F_x000D_ Logic standard cell library.
- 6 track High Density standard cell library at TSMC 180 nm
- Standard Cell Library in TSMC (12nm~180nm)
- 6 track Ultra High Density standard cell library at TSMC 180 nm
- SMIC 0.13um 6 track High Density Standard Cell Library - HVT,1.2v operating voltage