SHA512 & SHA384 core

Overview

The eSi-SHA512 core is an easy to use SHA hash accelerator peripheral for both SHA512 and SHA384.

This is a cryptographic hash function designed by the United States National Security Agency and is a U.S. Federal Information Processing Standard published by NIST. There are various hash lengths that are supported in the NIST FIPS 180-4 standard, this core supports SHA384 and SHA512.

Key Features

  • Simple register based interface
  • 81 clock cycles per 1024 bits of input data
  • AMBA 3 APB slave interface
  • DMA flow-control interface
  • Verilog 2001.

Block Diagram

SHA512 & SHA384 core Block Diagram

Deliverables

  • RTL
  • Testbench
  • Software libraries

Technical Specifications

Foundry, Node
Any
Maturity
Silicon proven
Availability
Now
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Semiconductor IP