The power-on-reset(POR) generates a reset pulse to ensure that the core processing circuits are in a defined state when the power is ramping up or ramping down. The POR detects the safe supply thresholds and protects the core circuits in case of supply regulation problems. The design platforms that operate with two supplies and an LDO need a composite reset pulse independent of power up sequence of two supplies.
This dual supply POR generates a composite reset pulse after both supplies are stabilized. The inbuilt timer in POR generates a delay in each of the supply power-up so that when the rest is released the supplies are stabilize. Once the supply is in safe limits and defined delays are provided, the POR generates a negative pulse to reset the core circuits. Thus, when reset is released the core is always in a defined state.
POWER ON RESET FOR DUAL SUPPLY SYSTEMS
Overview
Key Features
- Input voltage from 2.7V to 5.5V
- -40°C to +125°C Operating Temperature Range
- One supply can be unipolar (0 to 5V) or bipolar (-2.5V to +2.5V)
- 20µs typical delay for each supply
- 15µs typical reset pulse width
Applications
- Battery-powered applications
- Smartphones, Tablets and wireless LAN devices
- Industrial and medical equipments
Deliverables
- Dataseet
- Behavioral model
- Abstract LEF
- Timing LIB files
- CDL
- GDSII
- Full integration support
Technical Specifications
Foundry, Node
180nm
Maturity
Silicon matured