PLL (Frequency Synthesizer) IP, Input: 25MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HPM process
Overview
Input 25M-50MHz, output 1000M-2000MHz, frequency synthesizable PLL, UMC 28nm Logic and Mixed-Mode HPM process.
Technical Specifications
Foundry, Node
UMC 28nm HPM
UMC
Pre-Silicon:
28nm
HPM
Related IPs
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HPM process
- PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 40nm LP process
- PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 40nm LP process
- PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 40nm LP process
- PLL (Frequency Synthesizer) IP, Input: 20MHz - 200MHz, Output: 62.5MHz - 1GHz, UMC 28nm HLP process
- PLL (Frequency Synthesizer) IP, Input: 25MHz - 200MHz, Output: 1GHz -1.5GHz, UMC 90nm SP process