PCIe Switch Verification IP

Overview

The PCIe Switch Verification IP provides an effective & efficient way to verify the components interfacing with the PCIe Switch interface of an IP or SoC. The PCIe Switch is fully compliant with the latest PCIe specifications. This VIP is a light weight with an easy plug-and-play interface so that there is no hit on the design cycle time.

Key Features

  • Compliant with the PCIe 6,5,4,3 specification.
  • Support Pipe Specification 6.1.1
  • NVMe on top of Low Power, CXS, CPI, CXL, CXL Security, PCIe Gen6/5/4/3 management
  • Supports Pipe Specification 6.1 with both Low Pin Count and Serdes Architecture.
  • Compliant with PCIe Specifications 3, 4, 5 and 6
  • Supports Single and Multiple switches.
  • Support for Hot Add and Hot Remove for a PCIe Device.
  • Configurable switch downstream ports
  • Support multi root port configuration
  • Support PCIe tunneling/ PCIe adapter layer with USB4.

Block Diagram

PCIe Switch Verification IP  
 Block Diagram

Technical Specifications

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Semiconductor IP