The MXL-MPHY-S-130 is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used as a physical layer for many applications, including interfaces for display, camera, audio, video, memory, power management and Baseband to RFIC.
It supports the following standards: DigRF v4, CSI-3, DSI-2, Uniport-M (UniPro1.41) LLI and JC-64.1 UFS.
By using efficient BURST mode operation with scalable speeds, significant power savings can be obtained.
Selection of signal slew rate and amplitude allows reduction of EMI/RFI, while maintaining low bit error rates.
MIPI M-PHY in SMIC 130nm
Overview
Key Features
- Complies with MIPI Standard for M-PHY v3.0
- Dual-simplex point-to-point interface with ultra low voltage differential signaling
- Slew-rate control for EMI reduction
- Supports HS modes GEAR 1-3
- Supports all Type-I LS modes (GEAR 0-7)
- Supports Type-II LS mode
- 1- 6Gbps data rate in HS mode
- 0.01-576Mbps data rate in LS mode
- Suitable for copper and optical media
- Low power dissipation
Benefits
- Silicon proven in SMIC 130nm
Block Diagram
Applications
- Mobile
- Displays
- Cameras/Sensors
- IoT
- VR/AR/MR
- Consumer electronics
- Automotive
- Storage
Deliverables
- Specifications
- GDSII
- LVS netlist
- LEF file
- IBIS Model
- Verilog Model
- Timing Model
- Integration Guidelines
- RTL
- Documentation
- One year support
Technical Specifications
Foundry, Node
SMIC 130nm
Maturity
Silicon Proven
Availability
Now
SMIC
Silicon Proven:
130nm
LL