In-System IBERT IP
Overview
The LogiCORE In-System IBERT IP enables 2D eye scans of Ultrascale™/Ultrascale+™ transceivers to be performed the in Vivado® Serial I/O Analyzer tool. It utilizes data from the user design to plot the eye scans of transceivers in real-time while they interact with the rest of the system. This IP can be integrated with the user logic in the design or Xilinx transceiver-based IPs such as GT Wizard, Aurora, etc. This document details the IP functionality and different ways for adding it to the user design.
Key Features
- Provides a communication path to the Vivado Serial I/O Analyzer feature
- Utilizes data from user design to scan and measure the eye
- Provides access to DRP and selected Transceiver ports
- Requires a system clock that can be sourced from a pin or one of the enabled transceivers
Technical Specifications
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