High-performance and power-efficient processor core based on RISC-V Instruction Set Architecture (ISA)
Key Features
- Customization For Domain-Specific Needs
- Compatible with standard RISC-V instruction set and allow for certain extensions
- Catering to various target application needs, by optimizing the performance, power dissipation and PPA; supporting on-demand configuration of processor core’s major functionality, SoC system-level IPs, interfaces and other IPs.
- Optimization of Energy Efficiency by Adopting Multiple Layers of Low Power Design
Benefits
- A-Series: targeted for high-performance computing scenarios, e.g. desktop, AI, DPU, Cloud/Server etc.
- AE-Series: the enhanced version of A-Series specialized for automotive cases, targeted for high-performance telematics applications, e.g. auto piloting etc.
- E-Series: targeted for high power efficiency computing, e.g. edge computing etc.
Technical Specifications
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