HD H.264 decoder
Overview
xip901HD is a low-power consumption, small gate-count H.264 decoder supporting high-definition up to 1080p. It is fully compliant with H.264 MP/HP. The typical power consumption is about 200mw.
Key Features
- Fully compliant with ITU-T Recommendation H.264 | ISO/IEC 14496-10 AVC
- Support Main Profile up to Level 4.1 with the maximum bitrate at 50Mps
- Decode up to 720p @ 60fps, 1080HD @ 30fps
- Support complete Main Profile H.264 tools
- I, P, B pictures
- INTRA-4x4 mode with 9 prediction modes, INTRA-16x16 mode with 4 prediction modes
- Interlace coding, field /frame adaptive coding in frame(PAFF) and MB level(MBAFF)
- PCM mode at MB level
- B picture can be used as reference frame
- Two types of bi-directional prediction: spatial and temporal
- Weighted prediction in P and B picture
- Multiple reference frames up to 16 reference frames
- Context-Adaptive Variable Length Coding (CAVLC) and Context-Adaptive Binary Arithmetic Coding (CABAC)
- Multiple sequence parameter setting and multiple picture parameter setting
- Multiple slice in one picture
- In-loop de-blocking filter
- Decode one HD stream or dual SD streams simultaneously
- Optimized low-power and scalable architecture
- AMBA bus
Deliverables
- Hardware
- Verilog RTL
- RTL simulation test data
- Synthesis script templates (Synopsys Design Compiler, TCL-format)
- Static Timing Analysis script templates (Synopsys PrimeTime)
- Hardware test bench
- Software
- Hardware driver (eLinux or WinCE OS)
- xip901HD SW library (eLinux or WinCE OS)
- xip901HD API
- Example code
- Documents
- xip901HD Technical Reference Manual
- RTL simulation report
- RTL coverage report
- API user manual
Technical Specifications
Maturity
mature
Availability
now
TSMC
In Production:
130nm
G
Pre-Silicon: 130nm G
Silicon Proven: 130nm G
Pre-Silicon: 130nm G
Silicon Proven: 130nm G