GSMC 0.18um 1.8V/3.3V Clockgating Cell Library

Overview

VeriSilicon GSMC 0.18um 1.8V/3.3V Clockgating Cell (01) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic 1P6M Salicide 1.8/3.3V process. This library supports both latch posedge and latch negedge type clock gating cell with multiple drive strengths and with/without postcontrol test function. While satisfying the performance and power requirements, it was optimized for area efficiency.

Key Features

  • GSMC 0.18um Logic 1P6M Salicide 1.8V/3.3V process
  • Supports posedge and negedge type clock gating cells
  • Supports post-control test function
  • Supports multiple drive strengths
  • Suitable for four, five and six layers of metal
  • More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp

Technical Specifications

Foundry, Node
180nm
Maturity
Siliocn proven
Availability
Now
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Semiconductor IP