Fully-integrated temperature monitor

Overview

Key Features

• fully-integrated analog IP monitoring the junction temperature (TJ)
• two active-high alarm signals: one alarm signal indicating that TJ < TJ_low; one alarm signal indicating that TJ > TJ_high
• two trimming methods of the temperature detection thresholds: ±1.5°C accuracy method requiring temperature steps at TJ_low and TJ_high; ±5.0°C accuracy method involving only one step at 25°C
• operating junction temperature range: -40°C to 125°C
• minimum/maximum nominal values of the accurate trimming method: min(TJ_low) = -38.5°C; max(TJ_high) = 123.5°C
• minimum/maximum nominal values of the ambient trimming method: min(TJ_low) = -35.0°C; max(TJ_high) = 120.0°C
• power-supply voltage range: nominal core voltage ±10%
• typical characteristics of a 65 nm CMOS implementation: wake-up time shorter than 50 µs; operating current smaller than 150 µA; standby current lower than 100 nA; silicon area smaller than 0.05 mm²
• silicon proven in 130 nm, 110 nm and 65 nm CMOS process

Benefits

• Fully integrated
• Small area & low power
• Trimming at room temperature
• Accurate trimming
• Silicon proven

Deliverables

• GDSII stream and layer map file
• Library Exchange Format (LEF) file
• Circuit Description Language (CDL) netlist
• Liberty timing file (.lib)
• VHDL behavioral model
• design specification

Technical Specifications