DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Overview
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Technical Specifications
Foundry, Node
UMC 0.11um
Maturity
Pre-Silicon release
UMC
Pre-Silicon:
110nm
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