DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
Overview
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
Technical Specifications
Foundry, Node
UMC 40nm
UMC
Pre-Silicon:
40nm
,
40nm
LP
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