Certified USB2.0 Device Controller

Overview

Key Features

• Compliant with USB Rev 2.0 Specification
• Compliant with USB 2.0 Link Power Management Addendum
• Supports Aggressive Low Power Management
• PHY Interface : 16 / 8 bit UTMI, ULPI
• Optional support for high performance DMA Engine
• Optional support for EP0 Processor.
• Software configurable endpoint characterstics such as endpoint type, maximum packet size etc.
• Flexible User Application Logic
• Can be adapted by any SoC / OCB interface / offchip interconnects – such as AHB, AXI, PCIe
• Can operate in cut through mode exposing a Pravega Native Packet Interface allowing customer to integrate their DMA engines,
• Configurable Datawidth: 32, 64, 128 bit.
• Simple Register Interface for internal Register Access.
• Support for various Hardware and Software Configurability regarding Core characteristics.

Benefits

• Optional USB3.0 Core for future proofing
• Application Interface – AHB, AXI, PNPI
• Configurable Buffer Sizes, Ednpoint Characterstics such Endpoint Type, Maximum Packet size etc.
• PHY Interface : 8/16-t UTMI, ULPI
• Optional DMA Engine
• Optional EP0 Processor
• Highly modular and configurable design
• Layered architecture
• Fully synchronous design
• Supports both sync and async reset
• Clearly demarked clock domains
• Extensive clock gating support
• Multiple Power Well Support
• Software control for key features

Deliverables

• RTL Code
• Complete Testbenches
• Complete Testsuites
• Design Guides
• Verification Guides
• Synthesis Guides

Technical Specifications