ARM7TDMI-S compatible Microcontroller Core

Key Features

• Binary Compatible to standard ARM7TDMI
• Patent free
• Single Clock, fully Static Design
• 32 Bit RISC Architecture
• JTAG Test Port
• AMBA Bus Master
• AMBA AHB Bus Interface
• 200 MHz Clock Frequency, ~0.8mm² @0.18µm
• 0.22mW / MHz

Deliverables

• Synthesizable Verilog Source Code
• Synthesis Scripts (Synopsys)
• Training

Technical Specifications