The Quad Serial Peripheral Interface module either controls a serial data link as a master component, or reacts to a serial data link as a slave component.
The IPC-QSPI-AHB bus controller can be configured under software control to be a master component or slave component device. Reading and writing the core is done on the AMBA AHB bus interface. The core operates in various data modes from 4 bits to 32 bits (8 modes are supported in multiples of 4 data bits). The data is then serialized and then transmitted, either LSB or MSB first, using the standard 4-wire SPI bus interface or the extended Quad mode bus.
