AL-D300 is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking to integrate a high-performance video decoding solutions into their chips.
Built upon a true multi-format architecture, the AL-D300 decoder IP core provides highly scalable solution up to 8K resolution through their multi-core architecture and selectable video codecs.
The AL-D300 decoder IP core also generalizes the ultra-low latency decoding down to sub-frame latency for all mainstream video formats: AV1, VP9, H.265/HEVC, H.264/AVC and JPEG. With 8-, 10- and 12-bit support and supporting chroma sampling of 4:2:0, 4:2:2 and 4:4:4, this decoder core is truly market leading.
4K/8K Scalable Multi-Format Video Decoding IP Core
Overview
Key Features
- Supported formats
- AV1 Main profile (4:2:0 8/10-bit) and Professional profile (4:2:2 10-bit)
- VP9 Profile 0 (4:2:0 8-bit), Profile 2 (4:2:0 10-bit) and Profile 3 (4:2:2 10-bit)
- H.265/HEVC Main, Main 10, Main 12, Main 4:2:2 12 and Main 4:4:4 12 profiles, up to Level 6.1 – Main tier and High tier
- H.264/AVC Constrained Baseline, Main, High, High 10, High 4:2:2 and High 4:4:4 Predictive profiles, up to Level 6.1
- JPEG Baseline
- Interfaces
- AMBA APB interface for control registers programming
- AMBA AXI interfaces for data access
Benefits
- Prefectly suited for 8K video resolutions
- Selectable video codecs
- Low latency decoding
- Minimal silicon area
- Optimized memory bandwidth
- Support of compression mechanisms to lower the memory bandwidth requirements
- Fast and easy SoC integration
- User configurable control software
Applications
- Video contribution and transcoding
- Set-Top Boxes, Digital TV
- Smartphones and tablets
- Automotive
- Camera SoCs
Deliverables
- RTL source code
- C control software
- Bit accurate executable software reference model
- Documentation
Technical Specifications
Foundry, Node
16nm and below
Availability
Available
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