2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 28nm 28HPM
Overview
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully compliant with the DFI 3.1 specification, and features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST). In addition, our PHY IP is optimized to provide a complete solution when combined with Dolphin's DDRx and LPDDRx SDRAM Memory Controller IP.
Technical Specifications
Foundry, Node
TSMC 28nm CLN28HPM
Maturity
Pre Silicon
Availability
Available
TSMC
Pre-Silicon:
28nm
HPM
Related IPs
- 2.5V Secondary Oxide DDRx/LPDDRx combo IO interface TSMC 28nm 28HPM (CLN28HPM)
- 1.8V, 2.5V Secondary Oxide DDRx/LPDDRx combo IO interface - TSMC 22nm 22ULP,ULL
- 1.8V, 2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 22nm 22ULP,ULL
- 1.8V, 2.5V Secondary Oxide DDRx/LPDDRx combo IO interface - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
- 1.8V, 2.5V secondary oxide DDRx/LPDDRx PHY - TSMC 28nm 28HP,HPL,LP,ULP,HPC,HPC+,HPM
- 2.5V Secondary Oxide DDRx/LPDDRx PHY - TSMC 40nm 40G,LP,LP_eF,ULP,ULP_eF - 1.8V UMC 40ULP