10 Gigabit Ethernet PCS/PMA (10GBASE-R)

Overview

Included at no additional charge with Vivado® software

 

Xilinx provides the 10 Gigabit Ethernet PCS/PMA (10GBASE-R) IP core with integrated serial interface to ensure first time success in your design.

The 10 Gigabit Ethernet PCS/PMA (10GBASE-R) is a no charge Xilinx LogiCORE which provides a XGMII interface  to a 10 Gigabit Ethernet MAC and implements a 10.3125 Gbps serial single channel PHY providing a direct connection to a XFP using the XFI electrical specification or SFP+ optical module using SFI electrical specification. This optical module can be connect to a 10GBASE-SR, -LR or –ER optical link.

The demand for 10G Ethernet is being driven in the data center as internet data traffic continues to grow. LAN application include Storage Area Networking (SAN), aggregation of 1G Ethernet links, and switch to switch links in the data center, equipment room or in different buildings.

NOTE:  For UltraScale+ device support, refer to the 10G/25G Ethernet Subsystem

Key Features

  • Designed to 10-Gigabit Ethernet specification IEEE 802.3-2012 clause 49
  • 1588 hardware timestamping support available through AXI 10G Ethernet IP
  • Optional Management Data Interface (MDIO) interface to manage PCS/PMA registers according to specification IEEE 802.3-2012 clause 45
  • Supports LAN mode only
  • SDR XGMII interface connects seamlessly to the Xilinx 10G Ethernet MAC
  • Implements 64/66 Decode/Encode Scrambler/Descrambler, Gearbox, and Test Pattern Generator/Checker in GTH silicon
  • A 64-bit or 32-bit data width option is available for the 10GBASE-R standard.

Technical Specifications

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Semiconductor IP