TSMC N3E IP
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61
IP
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10)
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UCIe-A PHY for Advanced Package (x64) in TSMC N3E, North/South Orientation
- Supports data rates up to 40Gb/s and bandwidth density of 12.9Tbps/mm
- Compliant with the latest UCIe specification
- Integrated signal integrity monitors and comprehensive test and repair features
- Supports high-density advanced packaging technologies such as silicon interposer, silicon bridge, and RDL fanout
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HBM3 PHY V2 - TSMC N3E
- Supports 2.5D-based JEDEC standard HBM3 DRAMs with data rates up to 9600 Mbps
- 16 independent 64-bit memory channels
- Pseudo-channel operation supported to enable up to 32 32-bit pseudo-channels with 1024-bit PHY
- Supports up to 4 trained frequencies with <5us switching time
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HBM3 V2 Solution enabling access to HBM3 Controller and HBM3 PHY in TSMC N3E
- JEDEC HBM 3.0 DRAM
- DFI 5.0 compliant interface to HBM3 PHY
- Multiport Arm® AMBA® interface (4 AXI AXI™) with managed QoS or single-port host interface, per pseudo-channel
- Data rates up to 6.4 Gbps (DFI 1:1:2) (1.6GHz controller clock)
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LPDDR5X/5/4X PHY - TSMC N3E
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Support for data rates up to 8533 Mbps
- Designed for rapid integration with Synopsys LPDDR5X/5/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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DDR5 PHY - TSMC N3E
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time
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PCIe 5.0 PHY, TSMC N3E x8, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, TSMC N3E x4, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, TSMC N3E x2, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, TSMC N3E x1, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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32G PHY, TSMC N3E x8, North/South (vertical) poly orientation
- Supports 1.25 to 32 Gbps data-rate
- Supports PCI Express 5.0, 1G to 400G Ethernet, CCIX, CXL, and SATA protocols
- Supports x1 to x16 macro configurations with aggregation and bifurcation
- Spread Spectrum Clock (SSC)
