PCIe Controller IP
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223
IP
from 29 vendors
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10)
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PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
- Supports the PCI-SIG Single-Root I/O Virtualization (SR-IOV) Specification
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PCIe Controller for USB4 Hosts and Devices, supporting PCIe Tunneling
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
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PCIe 6.x / PCIe5.x / PCIe4.x / PCIe3.x / PCIe2.x / PCIe1.x Controller
- Implements PCIe 6.0 Specification at 64 GT/s
- Parallel Multiple TLP/DLLP processing engine for best performance, throughput, and latency
- Designed for easy integration with Alphawave PipeCORE™ PCIe PHY IP
- Key IP features configurable to optimize IP for exact application requirements
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PCIe Controller Testbench
- Emulates a Root Complex device enabling simulation of a PCI Express design
- Test scripts are used to generate Root Complex master requests
- Automatically responds to DUT master requests
- Performs automatic data logging and checking
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PCIE Controller IP
- Compliant with PCIE 1.0/2.0/3.0/4.0/5.0 Specifications
- Full PCIE Controller functionality
- Supports PIPE interface.
- Compatible with Gen1,2,3,4 and 5
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PCIe 3.0/3.1/USB3.0/SATA3 Combo PHY
- Standard PHY interface enables multiple IP sources for PCI Express Logical Layer and provides a target interface for PCI Express PHY vendors.
- Supports 2.5Gb/s only or 2.5Gb/s,5.0Gb/s and 8.0Gb/s serial data transmission rate
- Utilizes 8-bit, 16-bit or 32- bit parallel interface to transmit and receive PCI Express data
- Allows integration of high speed components into a single functional block as seen by the endpoint device designer.
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CCIX 1.1 Controller
- Track record of silicon proven PCIe 4.0 designs guarantees first-time silicon success
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PCI Express (PCIe) 4.0 Controller
- Compliant with PCIe 4.0, 3.1, 2.1, and 1.1 specifications
- 32/16b interface for 500MHz or 1GHz core operation
- Modes supported: Root Complex, EndPoint, or Dual Mode
- SR-IOV and multifurcation options