Intelligent Vision Processor IP
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High-performance 32-bit multi-core processor with AI acceleration engine
- Instruction set: T-Head ISA (32-bit/16-bit variable-length instruction set);
- Multi-core: Isomorphic multi-core, with 1 to 4 optional cores;
- Pipeline: 12-stage;
- Microarchitecture: Tri-issue, deep out-of-order;
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HDR Image Signal Processor
- Advanced motion compensation algorithms virtually eliminate HDR merge artifacts and transition noise
- Proprietary Locally Adaptive Tone Mapping technology
