7nm In-Chip Monitoring Subsystem IP
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IP
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PHY for PCIe 5.0 and CXL for TSMC 7nm FinFet
- High-performance PHY for data center applications
- Low-latency, long-reach, and low-power modes
- Wide range of protocols that support networking, storage, and computing applications
- Multi-protocol support for application flexibility
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10G-1.6T Ethernet/FiberChannel/FlexO Core
- PCS layer formed by bonded 2x 400GE PCS in PCS Layer
- Using 32 virtual logical lanes based on 2 x 400GE PCS to reduce power in 800G operation
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10G-800G Ethernet/FiberChannel/FlexO Core
- Combines Ethernet streams at a variety of rates to a single multi-channel interface at the MAC
