32-bit Ultra Low Power FFT IP

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Compare 9 IP from 5 vendors (1 - 9)

MIPI CSI2 Transmit Controller
- Camera Serial Interface (CSI-2) version 1.1
- D-PHY version 1.1
- CSI-2 interface on device side supports
- AMBA APB Slave for Control and Status
SMIC 0.18um 24Bit Sigma-Delta DAC
- Process: SMIC standard 0.18um /3.3V logic 1P6M
- Single-Ended DAC --THDN:-90dB@-6dB Fs Input --Dynamic Range, SNR: 100dB
- Audio Serial Interface --32bit word length --I2S mode
- 2-wire Serial Control Interface
High-performance 32-bit RISC CPU
- 32-bit RISC architecture
- 16 or 32 general purpose registers
- 104 basic instructions and 10 addressing modes
Ultra low power BLE 5.0 / ZigBee / Thread SoC - custom Modification, White Label chips
- 32bit proprietary MCU: Better power performance then ARM M0 with max speed of 48Mhz
- Memory: Program memory: 512kB Flash, 64kB on-chip SRAM with up to 32kB retention
- RF transceiver: BLE 5.1 Compliant, 1Mbps, 2Mbps, Long Range 125kbps and 500kbps Or 2.4GHz proprietary 1Mbps/2Mbps/250kbps/500kbps mode with Adaptive
- Frequency Hopping feature or 15.4 compliant, 250kbps
Low-power, 16-bit RISC CPU with cache
- 16-bit RISC architecture
- 16 or 32 general purpose registers
- 92 basic instructions and 10 addressing modes
Entry-level Low-Power 32-bit Processor
- AndeStar V3m architecture
- 2-stage pipeline
- 16 32-bit general-purpose registers
Low-cost & low-power 16-bit RISC CPU
- 16-bit RISC architecture
- 16 or 32 general purpose registers
- 92 basic instructions and 10 addressing modes
- Supports up to 74 user-defined instructions
Compact, low-power 32-bit RISC CPU
- 32-bit RISC architecture
- 16 or 32 general purpose registers
- 104 basic instructions and 10 addressing modes
- Optional IEEE 754 floating point unit (FPU)
Ultra Compact 32-bit RISC-V CPU Core
- AndeStar™ V5/V5e Instruction Set Architecture (ISA)
- Compliant to RISC-V technology
- Support RV32IMAC/EMAC